/* the head file modifier:     g   2014-12-04 14:55:45*/

/*  
* Copyright (C) 2013 Spreadtrum Communications Inc.  
*
* This program is free software; you can redistribute it and/or  
* modify it under the terms of the GNU General Public License 
* as published by the Free Software Foundation; either version 2 
* of the License, or (at your option) any later version.  
* 
* This program is distributed in the hope that it will be useful, 
* but WITHOUT ANY WARRANTY; without even the implied warranty of 
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the  
* GNU General Public License for more details.  
* 
*************************************************  
* Automatically generated C header: do not edit *  
*************************************************  
*/  
#ifndef __H_REGS_PUB_APB_HEADFILE_H__
#define __H_REGS_PUB_APB_HEADFILE_H___ _FILE__

#define  REGS_PUB_APB

/* registers definitions for PUB_APB */
#define REG_PUB_APB_BUSMON_CNT_START			SCI_ADDR(REGS_PUB_APB_BASE, 0x0000)/*BUSMON_CNT_START*/
#define REG_PUB_APB_BUSMON_CFG				SCI_ADDR(REGS_PUB_APB_BASE, 0x0004)/*BUSMON_CFG*/
#define REG_PUB_APB_DMC_PORT_REMAP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x1000)/*DMC_PORT_REMAP_EN*/
#define REG_PUB_APB_DMC_PORTS_MPU_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x1004)/*DMC_PORTS_MPU_EN*/
#define REG_PUB_APB_DMC_PORT0_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1008)/*DMC_PORT0_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT1_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x100C)/*DMC_PORT1_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT2_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1010)/*DMC_PORT2_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT3_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1014)/*DMC_PORT3_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT4_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1018)/*DMC_PORT4_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT5_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x101C)/*DMC_PORT5_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT6_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1020)/*DMC_PORT6_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT7_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1024)/*DMC_PORT7_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT8_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x1028)/*DMC_PORT8_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT9_ADDR_REMAP		SCI_ADDR(REGS_PUB_APB_BASE, 0x102C)/*DMC_PORT9_ADDR_REMAP*/
#define REG_PUB_APB_DMC_PORT0_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1030)/*DMC_PORT0_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT1_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1034)/*DMC_PORT1_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT2_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1038)/*DMC_PORT2_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT3_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x103C)/*DMC_PORT3_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT4_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1040)/*DMC_PORT4_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT5_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1044)/*DMC_PORT5_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT6_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1048)/*DMC_PORT6_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT7_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x104c)/*DMC_PORT7_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT8_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1050)/*DMC_PORT8_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT9_MPU_RANGE			SCI_ADDR(REGS_PUB_APB_BASE, 0x1054)/*DMC_PORT9_MPU_RANGE*/
#define REG_PUB_APB_DMC_PORT0_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1058)/*DMC_PORT0_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT1_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x105c)/*DMC_PORT1_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT2_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1060)/*DMC_PORT2_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT3_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1064)/*DMC_PORT3_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT4_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1068)/*DMC_PORT4_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT5_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x106c)/*DMC_PORT5_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT6_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1070)/*DMC_PORT6_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT7_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1074)/*DMC_PORT7_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT8_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x1078)/*DMC_PORT8_DUMP_ADDR*/
#define REG_PUB_APB_DMC_PORT9_DUMP_ADDR			SCI_ADDR(REGS_PUB_APB_BASE, 0x107c)/*DMC_PORT9_DUMP_ADDR*/
#define REG_PUB_APB_AXI_CHN0_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4000)/*AXI_CHN0_LP_EN*/
#define REG_PUB_APB_AXI_CHN1_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4004)/*AXI_CHN1_LP_EN*/
#define REG_PUB_APB_AXI_CHN2_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4008)/*AXI_CHN2_LP_EN*/
#define REG_PUB_APB_AXI_CHN3_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x400c)/*AXI_CHN3_LP_EN*/
#define REG_PUB_APB_AXI_CHN4_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4010)/*AXI_CHN4_LP_EN*/
#define REG_PUB_APB_AXI_CHN5_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4014)/*AXI_CHN5_LP_EN*/
#define REG_PUB_APB_AXI_CHN6_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4018)/*AXI_CHN6_LP_EN*/
#define REG_PUB_APB_AXI_CHN7_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x401c)/*AXI_CHN7_LP_EN*/
#define REG_PUB_APB_AXI_CHN8_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4020)/*AXI_CHN8_LP_EN*/
#define REG_PUB_APB_AXI_CHN9_LP_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x4024)/*AXI_CHN9_LP_EN*/
#define REG_PUB_APB_AXI_CHN0_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4028)/*AXI_CHN0_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN1_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x402c)/*AXI_CHN1_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN2_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4030)/*AXI_CHN2_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN3_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4034)/*AXI_CHN3_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN4_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4038)/*AXI_CHN4_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN5_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x403c)/*AXI_CHN5_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN6_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4040)/*AXI_CHN6_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN7_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4044)/*AXI_CHN7_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN8_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x4048)/*AXI_CHN8_LP_IDLE_CNT*/
#define REG_PUB_APB_AXI_CHN9_LP_IDLE_CNT		SCI_ADDR(REGS_PUB_APB_BASE, 0x404c)/*AXI_CHN9_LP_IDLE_CNT*/
#define REG_PUB_APB_PUB_CHN0_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4050)/*PUB_CHN0_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN1_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4054)/*PUB_CHN1_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN2_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4058)/*PUB_CHN2_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN3_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x405c)/*PUB_CHN3_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN4_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4060)/*PUB_CHN4_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN5_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4064)/*PUB_CHN5_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN6_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4068)/*PUB_CHN6_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN7_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x406c)/*PUB_CHN7_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN8_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x4070)/*PUB_CHN8_LP_CTRL*/
#define REG_PUB_APB_PUB_CHN9_LP_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x407c)/*PUB_CHN9_LP_CTRL*/
#define REG_PUB_APB_PUB_AUTO_GATE_COUNTER		SCI_ADDR(REGS_PUB_APB_BASE, 0x4080)/*PUB_AUTO_GATE_COUNTER*/
#define REG_PUB_APB_PUB_SOFT_DFS_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x5000)/*PUB_SOFT_DFS_CTRL*/
#define REG_PUB_APB_PUB_HARD_DFS_CTRL_LO		SCI_ADDR(REGS_PUB_APB_BASE, 0x5004)/*PUB_HARD_DFS_CTRL_LO*/
#define REG_PUB_APB_PUB_HARD_DFS_CTRL_HI		SCI_ADDR(REGS_PUB_APB_BASE, 0x5008)/*PUB_HARD_DFS_CTRL_HI*/
#define REG_PUB_APB_PUB_SOFT_PURE_DFS_CTRL		SCI_ADDR(REGS_PUB_APB_BASE, 0x500c)/*PUB_SOFT_PURE_DFS_CTRL*/
#define REG_PUB_APB_PUB_SOFT_PURE_DFS_CMD_STEP		SCI_ADDR(REGS_PUB_APB_BASE, 0x5010)/*PUB_SOFT_PURE_DFS_CMD_STEP*/
#define REG_PUB_APB_PUB_SOFT_PURE_DFS_CMD_SEQ_LO	SCI_ADDR(REGS_PUB_APB_BASE, 0x5014)/*PUB_SOFT_PURE_DFS_CMD_SEQ_LO*/
#define REG_PUB_APB_PUB_SOFT_PURE_DFS_CMD_SEQ_HI	SCI_ADDR(REGS_PUB_APB_BASE, 0x5018)/*PUB_SOFT_PURE_DFS_CMD_SEQ_HI*/
#define REG_PUB_APB_AXI_AW_COBUF_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x6000)/*AXI_AW_COBUF_EN*/
#define REG_PUB_APB_AXI_AWAPCMD_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x6004)/*AXI_AWAPCMD_EN*/
#define REG_PUB_APB_AXI_ARAPCMD_EN			SCI_ADDR(REGS_PUB_APB_BASE, 0x6008)/*AXI_ARAPCMD_EN*/
#define REG_PUB_APB_PUB_BIST_TEST_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x600c)/*PUB_BIST_TEST_CTRL*/
#define REG_PUB_APB_PUB_LP_GEN_CTRL			SCI_ADDR(REGS_PUB_APB_BASE, 0x6010)/*PUB_LP_GEN_CTRL*/



/* bits definitions for register REG_PUB_APB_BUSMON_CNT_START */
#define BIT_PUB_APB_PUB_BUSMON_CNT_START			(BIT(0))

/* bits definitions for register REG_PUB_APB_BUSMON_CFG */
#define BIT_PUB_APB_PUB_BUSMON9_EB				(BIT(25))
#define BIT_PUB_APB_PUB_BUSMON8_EB				(BIT(24))
#define BIT_PUB_APB_PUB_BUSMON7_EB				(BIT(23))
#define BIT_PUB_APB_PUB_BUSMON6_EB				(BIT(22))
#define BIT_PUB_APB_PUB_BUSMON5_EB				(BIT(21))
#define BIT_PUB_APB_PUB_BUSMON4_EB				(BIT(20))
#define BIT_PUB_APB_PUB_BUSMON3_EB				(BIT(19))
#define BIT_PUB_APB_PUB_BUSMON2_EB				(BIT(18))
#define BIT_PUB_APB_PUB_BUSMON1_EB				(BIT(17))
#define BIT_PUB_APB_PUB_BUSMON0_EB				(BIT(16))
#define BIT_PUB_APB_PUB_BUSMON9_SOFT_RST			(BIT(9))
#define BIT_PUB_APB_PUB_BUSMON8_SOFT_RST			(BIT(8))
#define BIT_PUB_APB_PUB_BUSMON7_SOFT_RST			(BIT(7))
#define BIT_PUB_APB_PUB_BUSMON6_SOFT_RST			(BIT(6))
#define BIT_PUB_APB_PUB_BUSMON5_SOFT_RST			(BIT(5))
#define BIT_PUB_APB_PUB_BUSMON4_SOFT_RST			(BIT(4))
#define BIT_PUB_APB_PUB_BUSMON3_SOFT_RST			(BIT(3))
#define BIT_PUB_APB_PUB_BUSMON2_SOFT_RST			(BIT(2))
#define BIT_PUB_APB_PUB_BUSMON1_SOFT_RST			(BIT(1))
#define BIT_PUB_APB_PUB_BUSMON0_SOFT_RST			(BIT(0))

/* bits definitions for register REG_PUB_APB_DMC_PORT_REMAP_EN */
#define BITS_PUB_APB_DMC_PORTS_REMAP_EN(_X_)			((_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)))

/* bits definitions for register REG_PUB_APB_DMC_PORTS_MPU_EN */
#define BITS_PUB_APB_DMC_PORTS_MPU_EN(_X_)			((_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)))

/* bits definitions for register REG_PUB_APB_DMC_PORT0_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT0_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT1_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT1_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT2_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT2_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT3_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT3_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT4_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT4_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT5_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT5_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT6_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT6_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT7_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT7_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT8_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT8_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT9_ADDR_REMAP */
#define BITS_PUB_APB_DMC_PORT9_ADDR_REMAP(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT0_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT0_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT1_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT1_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT2_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT2_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT3_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT3_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT4_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT4_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT5_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT5_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT6_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT6_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT7_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT7_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT8_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT8_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT9_MPU_RANGE */
#define BITS_PUB_APB_DMC_PORT9_MPU_RANGE(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT0_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT0_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT1_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT1_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT2_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT2_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT3_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT3_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT4_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT4_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT5_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT5_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT6_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT6_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT7_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT7_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT8_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT8_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_DMC_PORT9_DUMP_ADDR */
#define BITS_PUB_APB_DMC_PORT9_DUMP_ADDR(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN0_LP_EN */
#define BIT_PUB_APB_AXI_CHN0_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN1_LP_EN */
#define BIT_PUB_APB_AXI_CHN1_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN2_LP_EN */
#define BIT_PUB_APB_AXI_CHN2_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN3_LP_EN */
#define BIT_PUB_APB_AXI_CHN3_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN4_LP_EN */
#define BIT_PUB_APB_AXI_CHN4_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN5_LP_EN */
#define BIT_PUB_APB_AXI_CHN5_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN6_LP_EN */
#define BIT_PUB_APB_AXI_CHN6_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN7_LP_EN */
#define BIT_PUB_APB_AXI_CHN7_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN8_LP_EN */
#define BIT_PUB_APB_AXI_CHN8_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN9_LP_EN */
#define BIT_PUB_APB_AXI_CHN9_LP_EN				(BIT(0))

/* bits definitions for register REG_PUB_APB_AXI_CHN0_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN0_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN1_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN1_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN2_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN2_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN3_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN3_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN4_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN4_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN5_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN5_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN6_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN6_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN7_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN7_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN8_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN8_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_CHN9_LP_IDLE_CNT */
#define BITS_PUB_APB_AXI_CHN9_LP_IDLE_CNT(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_PUB_CHN0_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_0				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_0(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_0				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_0				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN1_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_1				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_1(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_1				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_1				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN2_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_2				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_2(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_2				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_2				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN3_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_3				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_3(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_3				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_3				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN4_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_4				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_4(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_4				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_4				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN5_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_5				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_5(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_5				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_5				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN6_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_6				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_6(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_6				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_6				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN7_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_7				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_7(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_7				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_7				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN8_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_8				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_8(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_8				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_8				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_CHN9_LP_CTRL */
#define BIT_PUB_APB_RF_PUB_CHN_EB_9				(BIT(12))
#define BITS_PUB_APB_RF_ACTIVE_HW_WAIT_CNT_9(_X_)		((_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BIT_PUB_APB_RF_CHN_SW_LP_EN_9				(BIT(1))
#define BIT_PUB_APB_RF_CHN_HW_LP_EN_9				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_AUTO_GATE_COUNTER */
#define BITS_PUB_APB_PUB_AUTO_GATE_COUNTER(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_PUB_SOFT_DFS_CTRL */
#define BITS_PUB_APB_PUB_DFS_SW_SWITCH_PERIOD(_X_)		((_X_) << 24 & (BIT(24)|BIT(25)|BIT(26)|BIT(27)|BIT(28)|BIT(29)|BIT(30)|BIT(31)))
#define BITS_PUB_APB_PUB_DFS_SW_RATIO_DEFAULT(_X_)		((_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)))
#define BITS_PUB_APB_PUB_DFS_SW_RATIO(_X_)			((_X_) << 6 & (BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BITS_PUB_APB_PUB_DFS_SW_FRQ_SEL(_X_)			((_X_) << 4 & (BIT(4)|BIT(5)))
#define BIT_PUB_APB_PUB_DFS_SW_RESP				(BIT(3))
#define BIT_PUB_APB_PUB_DFS_SW_ACK				(BIT(2))
#define BIT_PUB_APB_PUB_DFS_SW_REQ				(BIT(1))
#define BIT_PUB_APB_PUB_DFS_SW_ENABLE				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_HARD_DFS_CTRL_LO */
#define BITS_PUB_APB_PUB_DFS_HW_RATIO_DEFAULT(_X_)		((_X_) << 5 & (BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)))
#define BITS_PUB_APB_PUB_DFS_HW_INITIAL_FREQ(_X_)		((_X_) << 3 & (BIT(3)|BIT(4)))
#define BIT_PUB_APB_PUB_DFS_HW_STOP				(BIT(2))
#define BIT_PUB_APB_PUB_DFS_HW_START				(BIT(1))
#define BIT_PUB_APB_PUB_DFS_HW_ENABLE				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_HARD_DFS_CTRL_HI */
#define BITS_PUB_APB_PUB_DFS_HW_SWITCH_PERIOD(_X_)		((_X_) << 24 & (BIT(24)|BIT(25)|BIT(26)|BIT(27)|BIT(28)|BIT(29)|BIT(30)|BIT(31)))
#define BITS_PUB_APB_PUB_DFS_HW_F3_RATIO(_X_)			((_X_) << 18 & (BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)))
#define BITS_PUB_APB_PUB_DFS_HW_F2_RATIO(_X_)			((_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)))
#define BITS_PUB_APB_PUB_DFS_HW_F1_RATIO(_X_)			((_X_) << 6 & (BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)))
#define BITS_PUB_APB_PUB_DFS_HW_F0_RATIO(_X_)			((_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)))

/* bits definitions for register REG_PUB_APB_PUB_SOFT_PURE_DFS_CTRL */
#define BIT_PUB_APB_SOFT_CMD_RESP				(BIT(7))
#define BIT_PUB_APB_SOFT_CMD_DONE				(BIT(6))
#define BITS_PUB_APB_SOFT_CMD_FC_SEL(_X_)			((_X_) << 4 & (BIT(4)|BIT(5)))
#define BITS_PUB_APB_SOFT_CMD_NUM(_X_)				((_X_) << 1 & (BIT(1)|BIT(2)|BIT(3)))
#define BIT_PUB_APB_SOFT_CMD_START				(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_SOFT_PURE_DFS_CMD_STEP */
#define BITS_PUB_APB_SOFT_CMD_STEP(_X_)				(_X_)

/* bits definitions for register REG_PUB_APB_PUB_SOFT_PURE_DFS_CMD_SEQ_LO */
#define BITS_PUB_APB_SOFT_CMD_SEQ_LO(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_PUB_SOFT_PURE_DFS_CMD_SEQ_HI */
#define BITS_PUB_APB_SOFT_CMD_SEQ_HI(_X_)			(_X_)

/* bits definitions for register REG_PUB_APB_AXI_AW_COBUF_EN */
#define BITS_PUB_APB_AXI_AW_COBUF_EN(_X_)			((_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)))

/* bits definitions for register REG_PUB_APB_AXI_AWAPCMD_EN */
#define BITS_PUB_APB_AXI_AWAPCMD_EN(_X_)			((_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)))

/* bits definitions for register REG_PUB_APB_AXI_ARAPCMD_EN */
#define BITS_PUB_APB_AXI_ARAPCMD_EN(_X_)			((_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)))

/* bits definitions for register REG_PUB_APB_PUB_BIST_TEST_CTRL */
#define BIT_PUB_APB_PUB_A53_CHN_BIST_EN				(BIT(5))
#define BIT_PUB_APB_PUB_A53_BIST_PATH_SEL			(BIT(4))
#define BIT_PUB_APB_PUB_GPU_CHN_BIST_EN				(BIT(3))
#define BIT_PUB_APB_PUB_GPU_BIST_PATH_SEL			(BIT(2))
#define BIT_PUB_APB_PUB_VSP_CHN_BIST_EN				(BIT(1))
#define BIT_PUB_APB_PUB_VSP_BIST_PATH_SEL			(BIT(0))

/* bits definitions for register REG_PUB_APB_PUB_LP_GEN_CTRL */
#define BIT_PUB_APB_AUTO_STOP_NOC_ENABLE			(BIT(3))
#define BIT_PUB_APB_AUTO_STOP_DFS_ENABLE			(BIT(2))
#define BIT_PUB_APB_PUB_DFS_EN					(BIT(1))
#define BIT_PUB_APB_PUB_LP_EN					(BIT(0))

#endif
